Crossbars are structures which can connect any input to any output. It is common in VLSI chips to implement large crossbars, such as shown at 10 in FIG. 1, to switch inputs coupled to one circuit block 12 to outputs feeding a second circuit block 14. For example, a crossbar may have 64 inputs and 64 outputs, where each of the inputs and outputs is 16 bits wide. The crossbar is built largely out of multiplexers, where each output is driven by a 16 bit wide, 64 input multiplexer. The 64 input mux is in practice implemented as a tree of smaller muxes. With 64 crossbar outputs, there are 64 instances of this 64-input, 16 bit wide mux.
Crossbars conventionally can be efficiently implemented as regular datapath structures, where each output mux is a bitstack, or a regular datapath component. The 64 output muxes are then placed in a sequence. For example, as shown at 16 in FIG. 2, the mux bitstacks are horizontal, with bit 0 on the left and bit 15 on the right. The datapath is then built up vertically, with output mux 0 on the bottom and output mux 63 on the top.
In this arrangement, each of the 64 16 bit input wires must be broadcast to all 64 output muxes. FIG. 3 shows these 1024 wires at 18 running vertically the entire height of the crossbar 10. It is typically the case that the load represented by the inputs of the 64 muxes is too large to be driven by a single wire, where the wire 18 is long enough that the resulting RC time constant is unacceptable. As a result, repeaters 20 must be inserted in the input wires 18, as shown in FIG. 4 for the case of an input wire divided into 4 segments by 3 repeaters.
It is often the case that the data input wires 18 are registered just as they come into the crossbar 10. The output data wires 18 may also be registered by registers 22, as shown in FIG. 5, giving a full clock cycle for the crossbar to function, and allowing time for the input and output signals on the wires 18 to travel potentially long distances. When the data inputs are registered, the repeaters 20 are driven from the buffered output of the registers.
The arrangement of FIG. 5 is a conventional case where all 1024 data input wires are input to the bottom of the crossbar module. It is also possible to input wires to the top of the module, as shown in FIG. 6, using repeaters to form a basic repeater structure as shown.
There is desired an improved crossbar adapted to have data inputs at multiple sides of the module periphery and an architecture which provides custom programming to achieve such a feature.